The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2007

Filed:

Jan. 07, 2004
Applicants:

Clifford I. Drowley, Scottsdale, AZ (US);

Ching-chun Wang, Lexington, MA (US);

Jungwook Yang, Waban, MA (US);

Inventors:

Clifford I. Drowley, Scottsdale, AZ (US);

Ching-Chun Wang, Lexington, MA (US);

Jungwook Yang, Waban, MA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/113 (2006.01);
U.S. Cl.
CPC ...
Abstract

A photodiode sensor structure includes a first dopant type substrate with a first surface and a second dopant type well region with a second surface. The second dopant type well region is formed in the first dopant type substrate such that the first surface and the second surface are substantially co-planar to form a diode surface. An interface between the second dopant type well region and the first dopant type substrate at the diode surface forms a diode junction. A poly silicon region is formed along the periphery of the entire diode junction. The poly silicon region provides the p-n junction of the photodiode with a physical shield to prevent any process damage from being introduced after the poly silicon processing (including damages from processes such as dielectric deposition/pattern, metal deposition/pattern, and/or via/contact hole etching), thereby reducing leakage current. The poly silicon region can also provide the p-n junction of the photodiode with an electrical shield to prevent any possible trapped charges at higher levels of dielectric above the junctions to affect the surface potential and/or prevent the formation of conducting channels between the p-n regions, thereby reducing leakage current.


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