The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2007

Filed:

Jul. 28, 2004
Applicants:

Satyavolu S. Papa Rao, Garland, TX (US);

Stephan Grunow, Dallas, TX (US);

Phillip D. Matz, McKinney, TX (US);

Inventors:

Satyavolu S. Papa Rao, Garland, TX (US);

Stephan Grunow, Dallas, TX (US);

Phillip D. Matz, McKinney, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01); H01L 21/302 (2006.01);
U.S. Cl.
CPC ...
Abstract

An embodiment of the invention is a method of manufacturing an integrated circuit. The method includes forming a capping layer of a back end structure (step), drilling an extraction line from the capping layer to an inter-metal dielectric layer (step), performing a supercritical fluid process to remove portions of the inter-metal dielectric layer that are coupled to the extraction line (step): thereby forming a denuded dielectric region. Another embodiment of the invention is an integrated circuithaving a back-end structurecoupled to a front-end structureThe back-end structurehaving a first metal levelThe first metal levelhaving metal interconnectsand an inter-metal dielectric layerThe back-end structurefurther containing an extraction lineand a denuded dielectric regioncoupled to the extraction line


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