The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 20, 2007
Filed:
Mar. 28, 2005
Gerhard Sollner, Winchester, MA (US);
Lawrence J. Kushner, Andover, MA (US);
Michael P. Anthony, Andover, MA (US);
Edward Kohler, Waltham, MA (US);
Wesley Grant, Winsted, CT (US);
Gerhard Sollner, Winchester, MA (US);
Lawrence J. Kushner, Andover, MA (US);
Michael P. Anthony, Andover, MA (US);
Edward Kohler, Waltham, MA (US);
Wesley Grant, Winsted, CT (US);
Kenet, Inc., Woburn, MA (US);
Abstract
A technique for forming Charge-Coupled Devices (CCDs) in a conventional Complementary Metal Oxide Semiconductor (CMOS) process. A number of single-layer polysilicon gates are formed on an as-grown, native doped silicon substrate, with gaps between them. Masking is used to selectively dope the gates while preventing doping of the silicon in the gaps. Masking may likewise be used to selectively silicide the gates while preventing silicide formation in the gaps. Conventional source-drain processing produces input/output diffusions for the CCD.