The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2007

Filed:

Apr. 05, 2001
Applicants:

Christopher Peak, San Jose, CA (US);

Sathya Bettadapura, Campbell, CA (US);

Jeffrey Kimmel, San Jose, CA (US);

Inventors:

Christopher Peak, San Jose, CA (US);

Sathya Bettadapura, Campbell, CA (US);

Jeffrey Kimmel, San Jose, CA (US);

Assignee:

Network Appliance, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/44 (2006.01); G06F 9/45 (2006.01);
U.S. Cl.
CPC ...
Abstract

An analyzer that analyzes instructions and data to determine where the instructions and data might result in incorrect results when run on a multiprocessor system. The instructions and data are divided into plural domains based on the symbols used to refer to those instructions and data, and the multiprocessor system is configured to use at most one processor at a time to execute instructions and to access data from any one domain. The analyzer preferably includes a reference analyzer and a table generator. The reference analyzer determines which of the instructions and data involve references outside of their domains, and determines which of the references outside of their domains are multiprocessor unsafe references. The report generator generates a report of the multiprocessor unsafe references. Also, a checker that dynamically determines where instructions and data result in domain violations when run on a multiprocessor system. The checker includes an interface to a table of purportedly microprocessor safe references by the instructions and data outside of their domains. The table preferably includes the domains to which the references are supposed to refer. The checker also includes a reference tracker that tracks references made by the instructions and data, and a comparator that determines, when a reference in the table of purportedly microprocessor safe references is encountered during execution of the instructions and data, if the reference is actually to a domain to which that reference is supposed to refer.


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