The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 13, 2007
Filed:
Oct. 31, 2005
Tomoya Ishikawa, Osaka, JP;
Hirofumi Nakagawa, Kyoto, JP;
Tomoya Ishikawa, Osaka, JP;
Hirofumi Nakagawa, Kyoto, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
To a level shift basic circuit having a CMOS configuration and composed of four transistors Mthrough M, a control circuit for preventing feed-through current through the transistors is added. Transitions of complementary data inputs Vinand Vinare made in a period in which n-MOS transistors Mand Mfor control are turned OFF by changing a control input VSto an L level (switch-off period). In this switch-off period, each source of the n-MOS transistors Mand Mis disconnected from VSS. In addition, in the switch-off period, a control input VSis changed to an L level, thereby turning ON p-MOS transistors Mand Mfor control. In a period in which the control p-MOS transistors Mand Mare ON, data outputs Voutand Voutare both precharged to VDD (precharge period).