The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2007

Filed:

Dec. 23, 2003
Applicant:

Chi-ming Chang, Hsin-Chu, TW;

Inventor:

Chi-Ming Chang, Hsin-Chu, TW;

Assignee:

Mediatek Inc., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); H03L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention system adjusts a phase/frequency detecting device in a phase locked loop. The phase/frequency detecting device compares a target clock signal generated from the phase locked loop with a predetermined reference clock signal, and outputs a set of control signals to further control the target clock signal to synchronize with the reference clock signal. A reset module counts the set of control signals and outputs a set of reset signals when a predetermined reset condition is met. A switch module counts the set of reset signals and switches the phase/frequency detecting device between a normal mode and a glitch protection mode when a predetermined switch condition is met. When the phase/frequency detecting device is under the glitch protection mode, and the predetermined reset condition set by the reset module is met, the reset module outputs the set of reset signals and resets the phase/frequency detecting device.


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