The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2007

Filed:

Jun. 02, 2005
Applicant:

Naoya Tsuchiya, Nukata-gun, JP;

Inventor:

Naoya Tsuchiya, Nukata-gun, JP;

Assignee:

Denso Corporation, Kariya, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/14 (2006.01); G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

In order to drive an L load, FETs are disposed so as to be mirror-paired with FETs disposed at the power source side and the ground side respectively, and currents corresponding to mirrored currents of first and second currents flowing in FETs are made to flow in current mirror circuits, and the mirror ratio of the former is set so that the current ratio of the first current ratio is large, and the mirror ratio of the latter is set so that the current ratio of the second current side is large. When the first current is larger than the second current, the current flowing in the transistor through the mirror circuit is increased to set the transistor to a conducting state, and when the second current is larger than the first current, the current flowing in the transistor through the mirror circuit is increased to set the transistor to a conducting state.


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