The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2007

Filed:

Aug. 10, 2006
Applicants:

Fu-yuan Shiau, Chiayi, TW;

Yu-liang Wen, Taipei, TW;

Inventors:

Fu-Yuan Shiau, Chiayi, TW;

Yu-Liang Wen, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
Abstract

A manufacturing method of thin film transistor array substrate is provided. A substrate, whereon first, second, and third poly-silicon islands, a gate insulating layer, a plurality of first, second, and third gates, and a first passivation layer have been formed, is provided. A third patterned photoresist layer is formed on the first passivation layer by using a third half-tone mask. A first ion implantation process is performed with the third patterned photoresist layer as mask to form first sources/drains. A portion of the thickness of the third patterned photoresist layer is removed, and then portions of the first passivation layer and the gate insulating layer are removed with the third patterned photoresist layer as mask to form the first patterned passivation layer. The third patterned photoresist layer is removed. First, second and third source/drain conductive layers, a second patterned passivation layer, and pixel electrodes are formed in sequence.


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