The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2007

Filed:

Jul. 09, 2004
Applicants:

Hiroyuki Sadakata, Takatsuki, JP;

Koichiro Nomura, Ibaraki, JP;

Shoji Sakamoto, Kyoto, JP;

Inventors:

Hiroyuki Sadakata, Takatsuki, JP;

Koichiro Nomura, Ibaraki, JP;

Shoji Sakamoto, Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Conventionally, when a burn-in test is performed by means of utilizing a memory BIST circuit, a control of a reset operation for the memory BIST circuit is required from an external source. According to the present invention, it is configured that the memory BIST circuit is used for the burn-in test of a memory macro, and a BIST reset control circuit detects a memory BIST test completion signal from the memory BIST circuit, and automatically resets the memory BIST circuit. Thereby, repetitive continuous tests to the memory macro by the memory BIST circuit can be achieved, and the burn-in test by means of utilizing the memory BIST circuit can be performed.


Find Patent Forward Citations

Loading…