Acceleration of the programming of a memory module with the aid of a boundary scan (bscan) register

Abstract

In order to program a memory module, some of its inputs are stimulated via internal memory locations of a so-called boundary scan (BSCAN) register that is provided in the form of an IC or ASIC. In order to activate or deactivate a write operation, the control signal input of the memory module, said control signal input being responsible for generating a WRITE_ENABLE signal, is controlled exclusively. The switching over of the WRITE_ENABLE signal from 'LOW' to 'HIGH' potential and vice versa thus ensues according to two JTAG instructions of an instruction sequence that provides for the generation of a LOW or HIGH level at the setting signal input or resetting signal input of an update flip-flop of the memory location responsible for generating the WRITE_ENABLE signal. By appropriately modifying the control unit and the BSCAN cell, which stimulates the WRITE_ENABLE signal at the WR input of the memory module, the programming can be accelerated without having to expand the interface between the control unit and the BSCAN register to the board and equipment level. In another embodiment of the invention, a control unit automatically switches over the WRITE_ENABLE signal from “LOW” to “HIGH” potential or from HIGH to LOW potential at an appropriate or rather programmable point in time by setting or resetting the update flip-flop of the memory location responsible for generating the WRITE_ENABLE signal.