The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 2007
Filed:
Oct. 10, 2003
Ralf Brederlow, Poing, DE;
Jessica Hartwich, Neubiberg, DE;
Christian Pacha, München, DE;
Wolfgang Rösner, Ottobrunn, DE;
Thomas Schulz, Austin, TX (US);
Ralf Brederlow, Poing, DE;
Jessica Hartwich, Neubiberg, DE;
Christian Pacha, München, DE;
Wolfgang Rösner, Ottobrunn, DE;
Thomas Schulz, Austin, TX (US);
Infineon technologies AG, Munich, DE;
Abstract
An integrated circuit arrangement and method of fabricating the integrated circuit arrangement is described. The integrated circuit arrangement contains an insulating region and a sequence of regions which forms a capacitor. The sequence contains a near electrode region near the insulating region, a dielectric region, and a remote electrode region remote from the insulating region. The insulating region is part of an insulating layer arranged in a plane. The capacitor and an active component are arranged on the same side of the insulating layer and form a memory cell. The near electrode region and an active region of the component are arranged in a plane which lies parallel to the plane in which the insulating layer is arranged. A processor is also contained in the integrated circuit arrangement.