The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 2007
Filed:
Mar. 18, 2005
Woo-geun Lee, Yongin-si, KR;
Beom-seok Cho, Seoul, KR;
Je-hun Lee, Seoul, KR;
Chang-oh Jeong, Suwon-si, KR;
Sang-gab Kim, Seoul, KR;
Min-seok OH, Yongin-si, KR;
Young-wook Lee, Suwon-si, KR;
Hee-hwan Choe, Incheon-si, KR;
Woo-Geun Lee, Yongin-si, KR;
Beom-Seok Cho, Seoul, KR;
Je-Hun Lee, Seoul, KR;
Chang-Oh Jeong, Suwon-si, KR;
Sang-Gab Kim, Seoul, KR;
Min-Seok Oh, Yongin-si, KR;
Young-Wook Lee, Suwon-si, KR;
Hee-Hwan Choe, Incheon-si, KR;
Abstract
A method of manufacturing a thin film transistor array panel including forming a gate line on a substrate, forming a gate insulating layer on the gate line, forming a semiconductor layer on the gate insulating layer, forming a data line and a drain electrode on the semiconductor layer, depositing a passivation layer on the data line and the drain electrode, forming a photoresist including a first portion and a second portion, which is thinner than the first portion, on the passivation layer, etching the passivation layer using the photoresist as a mask to expose a portion of the drain electrode, removing the second portion of the photoresist, depositing a conductive film, and removing the first portion of the photoresist to form a pixel electrode on the exposed portion of the drain electrode.