The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2007

Filed:

Dec. 04, 2003
Applicants:

Hung Yu (David) Yang, Los Angeles, CA (US);

Jesse A. Castaneda, Los Angeles, CA (US);

Reza Rofougaran, Marina Del Ray, CA (US);

Inventors:

Hung Yu (David) Yang, Los Angeles, CA (US);

Jesse A. Castaneda, Los Angeles, CA (US);

Reza Rofougaran, Marina Del Ray, CA (US);

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01F 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing an on-chip transformer balun includes creating, on a semiconductor substrate, a primary winding having at least one substantially symmetrical primary turn on a first dielectric layer and at least one metal bridge on a second layer. A secondary winding is created on the semiconductor substrate, the secondary winding having at least one substantially symmetrical secondary turn on a third dielectric layer and at least one metal bridge on a fourth dielectric layer. In an alternative embodiment, the primary winding has at least one first primary turn on a first dielectric layer and at least one second primary turn on a second dielectric layer and at least one via that operably connects the first primary turn to the second primary turn. The secondary winding has at least one first secondary turn on a third dielectric layer and at least one second secondary turn on a fourth dielectric layer.


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