The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2007

Filed:

Jun. 16, 2004
Applicant:

David Levy, Lubbeek, BE;

Inventor:

David Levy, Lubbeek, BE;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and circuit are provided for controlling access of two synchronous busses with asynchronous clocks to a synchronous single port Random Access Memory (RAM). In one preferred method, the clock of bus A is switched off via a control flip-flop and then the clock of bus B is switched on, allowing the control and data signals to pass through simple multiplexers. Bus B becomes the owner of the RAM. Later, the clock of bus B is switched off via the control flip-flop and then clock of bus A is switched on, such that bus A becomes owner of the bus. This allows any relative speed between the bus clocks.


Find Patent Forward Citations

Levy, David. (2007). Access of two synchronous busses with asynchronous clocks to a synchronous single port ram (U.S. Patent No. 7170817). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7170817

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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