The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 30, 2007
Filed:
May. 09, 2005
Applicants:
Tzi-dar Chiueh, Taipei, TW;
Po-chun Hsieh, Kaohsiung, TW;
Inventors:
Tzi-Dar Chiueh, Taipei, TW;
Po-Chun Hsieh, Kaohsiung, TW;
Assignee:
National Taiwan University, Taipei, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A low-power delay buffer circuit is provided, which utilizes a ring counter as address decoder and a latch array for memory. To reduce power consumption, a gated-clock driver tree is applied to the ring-counter addressing architecture. Moreover, a similar gated-driver tree is applied to the input and output ports of the latch array. The delay buffer circuit not only could achieve a power consumption lower than SRAM-based delay buffers, but also could operation under high frequencies and take up less layout area than SRAM-based delay buffers.