The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2007

Filed:

Jan. 29, 2004
Applicants:

Peter Z. Onufryk, Flanders, NJ (US);

Inna Levit, Sunnyvale, CA (US);

Inventors:

Peter Z. Onufryk, Flanders, NJ (US);

Inna Levit, Sunnyvale, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 5/06 (2006.01); G06F 1/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A rate limiting circuit for data stream transmissions provides a generated clock signal to a buffer interposed between source and destination components so as to programmably adjust the maximum rate that data can be passed through the buffer. A counter is incremented by one each (1+RL) cycles of a clock signal, where RLis the larger of a user programmable value (RL) and a manufacturer one-time programmed value (SERL). A controller receiving a request to access the buffer for a read or write operation, checks the count of the counter before activating the access enable line. If the count is greater than zero, then the controller activates the access enable line while decrementing the counter by one. If the count is zero, however, then the controller waits until the count is greater than zero before activating the access enable line to grant the request.


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