The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2007

Filed:

May. 26, 2005
Applicants:

Dai Matsuoka, Akita, JP;

Katsunari Moriai, Akita, JP;

Takehiko Abe, Akita, JP;

Koichi Ishii, Akita, JP;

Inventors:

Dai Matsuoka, Akita, JP;

Katsunari Moriai, Akita, JP;

Takehiko Abe, Akita, JP;

Koichi Ishii, Akita, JP;

Assignee:

TDK Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 4/228 (2006.01);
U.S. Cl.
CPC ...
Abstract

A multilayer chip varistor comprises a multilayer body and a pair of external electrodes formed on the multilayer body. The multilayer body has a varistor section and a pair of outer layer sections disposed so as to interpose said varistor section. The varistor section comprises a varistor layer developing a voltage nonlinear characteristic and a pair of internal electrodes disposed so as to interpose the varistor layer. The pair of external electrodes are connected to respective electrodes of the pair of internal electrodes. The relative dielectric constant of the outer layer sections is set lower than the relative dielectric constant of the region where the pair of internal electrodes in the varistor layer overlap each other.


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