The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 23, 2007
Filed:
Sep. 30, 2004
Applicants:
Lieyi Fang, Plano, TX (US);
Asit Shankar, Richardson, TX (US);
Lars Risbo, Copenhagen, DK;
Inventors:
Assignee:
Texas Instruments Incorporated, Dallas, TX (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/03 (2006.01); H03B 5/12 (2006.01); H03L 7/093 (2006.01);
U.S. Cl.
CPC ...
Abstract
The present invention achieves technical advantages as a high performance analog charge pumped phase locked loop (PLL)() with process and temperature compensation in closed loop bandwidth. The PLL reduces the variation in bandwidth and stability by making the product K*Iindependent of process and temperature variation. The PLL achieves a higher performance than existing PLL architectures, achieving a high dynamic range up to at least 110 dB, such that a PWM class-D amplifier is realizable with this PLL. The PLL has a constant bandwidth and damping factor while using an analog charge pump ().