The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 16, 2007
Filed:
Mar. 03, 2005
Tsutomu Tamaki, Tokyo, JP;
Takuya Suzuki, Tokyo, JP;
Koichi Matsuo, Tokyo, JP;
Hiroshi Kai, Tokyo, JP;
Tsutomu Tamaki, Tokyo, JP;
Takuya Suzuki, Tokyo, JP;
Koichi Matsuo, Tokyo, JP;
Hiroshi Kai, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
Heretofore, a plurality of packages were used in a high frequency module in which a plurality of waveguide terminals were positioned resulting in problems, such as degradation of characteristics in the connection lines between packages, lower ease of assembly when mounting and connecting the connection lines, increased cost, and so forth. To solve these problems, a plurality of cavities having a part or the entire side metallized is formed in a multi-layer dielectric substrate. The multi-layer dielectric substrate is provided with a plurality of waveguide terminals, microstrip line-waveguide converters, RF lines, bias and control signal wiring, and bias and control signal pads. A high frequency circuit is mounted within the cavity and sealed with a seal and cover. This is intended to reduce the number of package, improve performance, improve fabrication, and lower the cost.