The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2007

Filed:

Jun. 22, 2004
Applicants:

Andrej Litwin, Danderyd, SE;

Ola Pettersson, Järfälla, SE;

Inventors:

Andrej Litwin, Danderyd, SE;

Ola Pettersson, Järfälla, SE;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H 3/22 (2006.01);
U.S. Cl.
CPC ...
Abstract

A device for ESD protection of a high frequency circuit () of a semiconductor device comprises first () and second () p-type and first () and second () n-type JFET's, wherein the first p-type JFET () is connected with its gate to a high voltage source, its source to an input/output pad () of the semiconductor device, and its drain to the source of the first n-type JFET (), the second p-type JFET () is connected with its gate to the high voltage source, its source to the drain of the second n-type JFET (), and its drain to an input/output terminal of the circuit (), the first n-type JFET transistor () is connected with its gate to ground (GND), and its drain to the input/output terminal, and the second n-type JFET transistor () is connected with its gate to ground (GND), and its source to the input/output pad ().


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