The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 09, 2007
Filed:
Mar. 08, 2004
Prasenjit Biswas, Saratoga, CA (US);
Gautam Dewan, Cupertino, CA (US);
Kevin Iadonato, San Jose, CA (US);
Norio Nakagawa, Tokyo, JP;
Kunio Uchiyama, Tokyo, JP;
Prasenjit Biswas, Saratoga, CA (US);
Gautam Dewan, Cupertino, CA (US);
Kevin Iadonato, San Jose, CA (US);
Norio Nakagawa, Tokyo, JP;
Kunio Uchiyama, Tokyo, JP;
Renesas Technology America, Inc., San Jose, CA (US);
Abstract
An FPU pipeline is synchronized with a CPU pipeline. Synchronization is achieved by having stalls and freezes in any one pipeline cause stalls and freezes in the other pipeline as well. Exceptions are kept precise even for long floating point operations. Precise exceptions are achieved by having a first execution stage of the FPU pipeline generate a busy signal, when a first floating point instruction enters a first execution stage of the FPU pipeline. When a second floating point instruction is decoded by the FPU pipeline before the first floating point instruction has finished executing in the first stage of the FPU pipeline, then both pipelines are stalled.