The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2007

Filed:

Jan. 28, 2003
Applicants:

Mihail Iotov, San Jose, CA (US);

Greg Starr, San Jose, CA (US);

Inventors:

Mihail Iotov, San Jose, CA (US);

Greg Starr, San Jose, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system and method facilitates the implementation of analog circuitry in electronic programmable devices. A user can specify user measurable parameters for analog features of the circuit, without requiring knowledge of the internal way in which those analog circuit are implemented in the programmable device to achieve desired properties of the analog parameters of interest. The implementation can be performed in different devices which may implement the analog circuit in vastly different ways.


Find Patent Forward Citations

Iotov, Mihail. (2007). System and method for design entry and synthesis in programmable logic devices (U.S. Patent No. 7159204). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7159204

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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