The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2007

Filed:

Jan. 17, 2003
Applicants:

Rajat Chauhan, Idgha, IN;

Rajesh Kaushik, Haryana, IN;

Inventors:

Rajat Chauhan, Idgha, IN;

Rajesh Kaushik, Haryana, IN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and an improved FPGA apparatus for enabling the selective deployment of unused flip-flops or other circuit elements in IO cells and unused decoders or other circuit elements in Look Up Tables (LUT), for core logic functions is provided, comprising disconnecting means for selectively disconnecting unused circuit elements from the IO pad circuitry or from said LUT circuitry, and connecting means for selectively connecting said disconnected circuit elements either to the connection matrix of the core logic or between themselves to provide independently configured functions.


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