The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2006
Filed:
Jan. 10, 2003
Ryuichi Furukoshi, Saitama, JP;
Mizuki Utsuno, Saitama, JP;
Ryuichi Furukoshi, Saitama, JP;
Mizuki Utsuno, Saitama, JP;
Sanken Electric Co., Ltd., Saitama, JP;
Abstract
An input voltage is applied by an NMOS transistor () driven by an oscillation circuit () to a primary winding () of a transformer () intermittently. A voltage induced in a secondary winding () is rectified and smoothed by an output circuit () to be an output voltage. In a normal mode where no standby signal is supplied, the oscillation circuit () controls the NMOS transistor () so that the output voltage is stabilized at a predetermined first value. When a standby signal is supplied, a detection circuit () detects the standby signal and transmits the detection to a starting circuit (). The starting circuit () starts the oscillation circuit () when a voltage of a capacitor () reaches an upper limit, and stops the oscillation circuit () when this voltage lowers below a lower limit. This upper limit is lower than an upper limit at which the starting circuit () starts the oscillation circuit () in the normal mode.