The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2006
Filed:
Feb. 24, 2004
Jang-kun Song, Seoul, KR;
Yong-woo Choi, Suwon, KR;
Jang-Kun Song, Seoul, KR;
Yong-Woo Choi, Suwon, KR;
Samsung Electronics Co., Ltd., Suwon-Si, KR;
Abstract
In a method of fabricating a thin film transistor array substrate, a black matrix with horizontal and vertical portions is first formed on a substrate with an opaque conductive material. A gate line assembly is formed on the black matrix, and buffer layers are formed between the separate portions of the black matrix. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially deposited onto the substrate. And a data line assembly is formed on the ohmic contact layer. The ohmic contact layer exposed through the data line assembly is etched, and a protective layer is deposited onto the substrate. The protective layer, the gate insulating layer, and the semiconductor layer are patterned to form contact holes and opening portions exposing the insulating layer at pixel areas. The peripheral portions of the black matrix are also exposed through the opening portions. An indium tin oxide layer is deposited onto the substrate, and patterned to form pixel electrodes, subsidiary gate pads and subsidiary data pads that are connected to the drain electrodes, the gate pads and the data pads through the contact holes. Buffer conductive layers are formed at the same plane as the data line assembly or the pixel electrodes while being positioned over the semiconductor pattern between the neighboring data lines. Opening portions may be formed at a common electrode of the color filter substrate over the semiconductor pattern.