The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2006

Filed:

Feb. 23, 2005
Applicants:

Zhongding Liu, Beijing, CN;

Joe BI, Beijing, CN;

Ken-ming LI, Taipei, TW;

Gray Pan, Beijing, CN;

Gary Yang, Beijing, CN;

Inventors:

Zhongding Liu, Beijing, CN;

Joe Bi, Beijing, CN;

Ken-Ming Li, Taipei, TW;

Gray Pan, Beijing, CN;

Gary Yang, Beijing, CN;

Assignee:

Via Technologies Inc., Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

Comparators outputting offset calibration. A MOS current mode logic (MCML) circuit receives input signals and generates differential logic signals on output terminals thereof, and comprises a calibration unit coupled to the output terminals, calibrating output offsets at the output terminals according to digital calibration codes. An output stage is coupled to the differential logic signals at the output terminals of the MCML circuit to amplify the differential logic signal and generating a comparison resulting signal. By adjusting the digital calibration codes applied to the calibration unit, current on the output terminals can be adjusted, such that output offsets at the output terminals of the MCML circuitcan be eliminated.


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