The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7152193 B1

PDF
Full Text
Expired
Date of Patent:
Dec. 19, 2006

Filed:

Aug. 13, 2002
Applicants:

Daniel R. Watkins, Saratoga, CA (US);

Christopher Cubiss, Campbell, CA (US);

Inventors:

Daniel R. Watkins, Saratoga, CA (US);

Christopher Cubiss, Campbell, CA (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

A circuit generally including a control function and a checksum function is disclosed. The control function may be configured to assert (i) a start signal in response to a signal having a predetermined sequence of values matching an entry value and (ii) a stop signal in response to the signal matching an exit value. The checksum function may be configured to (i) generate a checksum value for the signal between assertions of the start signal and the stop signal and (ii) generate a result signal in response to comparing the checksum value with an expected value.


Find Patent Forward Citations

Watkins, Daniel. (2006). Embedded sequence checking (U.S. Patent No. 7152193). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7152193

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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