The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 19, 2006
Filed:
Aug. 23, 2004
Applicants:
Yong-tae Kim, Seoul, KR;
Seong-il Kim, Seoul, KR;
Chun-keun Kim, Seoul, KR;
Sun-il Shim, Seoul, KR;
Inventors:
Assignee:
Korea Institute of Science and Technology, Seoul, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A fabrication method of a self-aligned ferroelectric gate transistor using a buffer layer of high etching selectivity is disclosed. A stacked structure is formed with a buffer layer with high etching selectivity inserted between a silicon substrate and a ferroelectric layer, and etching is performed on a portion where a source and a drain will be formed and then stopped at the buffer layer, thereby fabricating a self-aligned ferroelectric gate transistor without damage to the silicon thin film, and thus, an integration degree of a chip can be improved.