The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 12, 2006
Filed:
Aug. 25, 2003
Darren Neuman, Palo Alto, CA (US);
Chengfuh Jeffrey Tang, Saratoga, CA (US);
Yao-hua Steven Tseng, Fremont, CA (US);
Guang Ting Shih, San Jose, CA (US);
Wen Huang, San Jose, CA (US);
Charles Thomas Monahan, Mountain View, CA (US);
Darren Neuman, Palo Alto, CA (US);
Chengfuh Jeffrey Tang, Saratoga, CA (US);
Yao-Hua Steven Tseng, Fremont, CA (US);
Guang Ting Shih, San Jose, CA (US);
Wen Huang, San Jose, CA (US);
Charles Thomas Monahan, Mountain View, CA (US);
Broadcom Corporation, Irvine, CA (US);
Abstract
Provided is a system and method for performing CRC analysis in a video test bench. An exemplary system includes a memory configured for storing a required number representative of the data fields to be analyzed. A module is coupled at least indirectly to the memory and configured for (i) receiving an input data stream, (ii) performing cyclic redundancy check (CRC) analysis of the received data stream, and (iii) producing an output representative of an actual number of received data fields analyzed. The input data stream includes synchronization markers defining boundaries of each of the received data fields. Next, a comparator is configured for (i) comparing the required number and the actual number and (ii) producing a disabling signal when the actual number matches the required number. A detector is coupled to the comparator and configured for (i) receiving the input data stream and sensing a presence of the synchronization markers, (ii) receiving the disabling signal, and (iii) disabling the CRC module when the disabling signal is received.