Method and system for test data capture and compression for electronic device analysis

Abstract

Electronic devices, such as memory devices are tested by applying test data, such as vectors of memory data having data field, control and address information, with a tester to detect error responses. Applied test data is captured, compressed and stored for subsequent analysis to isolate the test data associated with the error response. The saved compressed test data is de-compressed to replay the test data for a logic analyzer so that adequate history of the test data exists to determine the test cycles that included the stimulus associated with the error response. Identification of the test cycles that include the stimulus associated with the error response allows creation of test programs that run in reduced time by avoiding empty test cycles not associated with the error response.