The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 12, 2006
Filed:
Jun. 04, 2003
Bruno W. Garlepp, Milpitas, CA (US);
Gerard Pepenella, Manorville, NY (US);
Bruno W. Garlepp, Milpitas, CA (US);
Gerard Pepenella, Manorville, NY (US);
Silicon Laboratories Inc., Austin, TX (US);
Abstract
A first phase-locked loop circuit that includes a crystal oscillator, receives a reference clock signal and supplies a first phase-locked loop output signal based on the reference clock during normal operational mode and a stored value in holdover mode. A second phase-locked loop circuit receives the first phase-locked loop output signal and utilizes the first phase-locked loop output signal when generating an output clock in holdover mode. The second phase-locked loop utilizes the first phase-locked loop output signal during operation in the holdover mode to generate the output clock and utilizes the reference clock during normal operational mode to generate the output clock. Alternatively, the second phase-locked loop utilizes the first phase-locked loop output signal both during operation in the holdover mode and during normal operational mode to generate the output clock. The first phased-lock loop circuit may include a low pass filter coupled to the loop filter, which supplies a low pass filtered signal to the crystal oscillator in holdover mode. The first phased-lock loop circuit may include a low pass filter and a delay circuit coupled to the loop filter, which supply a delayed and low pass filtered signal to the crystal oscillator in holdover mode.