The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7148096 B1

PDF
Full Text
Expired
Date of Patent:
Dec. 12, 2006

Filed:

May. 26, 2004
Applicant:

Kazuya Ohuchi, Yokohama, JP;

Inventor:

Kazuya Ohuchi, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
Abstract

An aspect of the present invention includes a first conductive type semiconductor region formed in a semiconductor substrate, a gate electrode formed on the first conductive type semiconductor region, a channel region formed immediately below the gate electrode in the first conductive type semiconductor region, and a second conductive type first diffusion layers constituting source/drain regions formed at opposite sides of the channel region in the first conductive type semiconductor region, the gate electrode being formed of polycrystalline silicon-germanium, in which the germanium concentration of at least one of the source side and the drain side is higher than that of the central portion.


Find Patent Forward Citations

Ohuchi, Kazuya. (2006). Method of manufacturing a semiconductor device having a gate electrode containing polycrystalline silicon-germanium (U.S. Patent No. 7148096). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7148096

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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