The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 12, 2006
Filed:
Apr. 02, 2004
Michiaki Iha, Otsu, JP;
Michiaki Iha, Otsu, JP;
Abstract
A multilayer circuit component and a method for manufacturing the same, in which the difference of the amounts of baking shrinkages between each of the glass-containing layers is small, and the enlargement rate of the diameter of the via hole formed in each of the glass-containing layers is close to those in the other layers, so that it is possible to prevent a short circuit defect due to the mutual short circuit of the conductors in the via hole from occurring, and the warp of the substrate is reduced. The multilayer circuit component is provided with at least two glass-containing layers on a substrate, differentiating the softening temperature of glass compounded in the first glass-containing layer formed on the substrate from the softening temperature of glass compounded in the second glass-containing layer formed on the first glass-containing layer. The difference in the sintering properties due to the difference between the wettabilities is counterbalanced, and therefore, a multilayer circuit component, in which the warp of the substrate is reduced, and the degree of the enlargement of the via hole diameter of each of the glass-containing layers during baking is uniform, is produced.