The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 2006
Filed:
Nov. 19, 2002
Joseph Horanzy, Bensalem, PA (US);
Joseph Horanzy, Bensalem, PA (US);
Computer Network Technoloy Corp., Minneapolis, MN (US);
Abstract
A method and apparatus for configuring multiple first programmable logic devices from a single memory includes a microprocessor, and a second programmable logic device containing the interface logic for the first programmable device and the microprocessor. The present invention allows multiple FPGAs to be programmed from a single memory structure under the control of the microprocessor thereby using fewer components than systems dedicating a separate memory to each FPGA. A communications port allows new configurations to be downloaded to the microprocessor memory. In addition, the present invention can be used in combination with standard systems with each FPGA having its own memory, with the microprocessor being able to select between the central microprocessor memory and the local memory for programming each FPGA.