The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 05, 2006

Filed:

Nov. 12, 2005
Applicants:

Lynne M. Brocco, Cambridge, MA (US);

Todd R. Comins, Chelmsford, MA (US);

Nathan J. Dohm, Natick, MA (US);

David E. Mayhew, Northborough, MA (US);

Carey J. Mcmaster, Stow, MA (US);

Inventors:

Lynne M. Brocco, Cambridge, MA (US);

Todd R. Comins, Chelmsford, MA (US);

Nathan J. Dohm, Natick, MA (US);

David E. Mayhew, Northborough, MA (US);

Carey J. McMaster, Stow, MA (US);

Assignee:

StarGen Technologies, Inc., Marlborough, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention relates generally to a generic fabric interconnect system and method for providing a data path between and among nodes and processing elements within an interconnection fabric. More specifically, there is provided a device accessible by a host processor for expanding access over a first bus to a second bus, the first bus and the second bus each being adapted to separately connect to respective ones of a plurality of bus-compatible devices, each device which comprise a link, a first circuit adapted to couple between the first bus and the link, and a second circuit adapted to couple between the link and the second bus, the first circuit and the second circuit each being operated as a bridge and being operable to (a) send outgoing information serially through said link in a form different from that of the first bus and the second bus (b) approve an initial exchange between the first bus and the second bus in response to pending bus transactions having a characteristic signifying a destination across a device, and (c) allow the host processor, communicating through the first bus, to individually address different selectable ones of the bus-compatible devices on the second bus: (i) using on the first bus substantially the same type of addressing as is used to access devices on the first bus, and (ii) without first employing a second, intervening one of the bus-compatible devices on the second bus.


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