The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 2006
Filed:
Dec. 23, 2004
Seung-wook Kwack, Ichon-shi, KR;
Jong-tae Kwak, Ichon-shi, KR;
Seung-Wook Kwack, Ichon-shi, KR;
Jong-Tae Kwak, Ichon-shi, KR;
Hynix Semiconductor Inc., Kyoungki-Do, KR;
Abstract
Disclosed is a semiconductor memory device capable of reducing chip area by precharging all banks simultaneously. The semiconductor memory device includes: a command decoder for generating an auto refresh signal in response to an external command; an active information signal generator for generating an active information signal in response to a bank grouping signal when the auto refresh signal is activated; a tRAS controller for generating a tRAS control signal for each bank in response to an activated bank active detection signal, wherein the tRAS control signal maintains an active state during a row active time; a precharge information signal generator for generating a precharge information signal in response to the tRAS control signal of a last activated bank; and a bank control signal generator for generating a bank active signal in response to the active information signal and generates a bank precharge signal in response to the precharge information signal, respectively.