The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 05, 2006

Filed:

Mar. 11, 2004
Applicants:

Irwin L. Newberg, Pacific Palisades, CA (US);

John K. Keigharn, Rancho Palos Verdes, CA (US);

Jonathan D. Gordon, Hermosa Beach, CA (US);

Garin S. Bircsak, No. Hollywood, CA (US);

Inventors:

Irwin L. Newberg, Pacific Palisades, CA (US);

John K. Keigharn, Rancho Palos Verdes, CA (US);

Jonathan D. Gordon, Hermosa Beach, CA (US);

Garin S. Bircsak, No. Hollywood, CA (US);

Assignee:

Raytheon Company, Waltham, MA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01S 7/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system for generating a simulated radar return signal. The novel system includes a processor adapted to receive target and waveform parameters and in accordance therewith generate a composite digital signal, and a digital to analog converter adapted to convert the digital signal to an analog signal. The system also includes an upconverter adapted to convert the analog signal to radio frequency. The processor calculates time-domain digital data samples representing a composite radar return waveform based on the target and waveform parameters. These data samples are output at each time interval that the digital to analog converter samples data. The composite waveform can include returns from a large number of targets and from targets embedded in clutter. The system can also be adapted to test a radar system having multiple antenna ports by replicating the basic design for each port.


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