The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 05, 2006

Filed:

Nov. 03, 2004
Applicants:

Albert Birner, Dresden, DE;

Matthias Foerster, Dresden, DE;

Thomas Hecht, Dresden, DE;

Michael Stadtmueller, Dresden, DE;

Andreas Orth, Dresden, DE;

Inventors:

Albert Birner, Dresden, DE;

Matthias Foerster, Dresden, DE;

Thomas Hecht, Dresden, DE;

Michael Stadtmueller, Dresden, DE;

Andreas Orth, Dresden, DE;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8242 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention provides a method for fabricating a memory cell, a substrate () being provided, a trench-type depression () being etched into the substrate (), a barrier layer () being deposited non-conformally in the trench-type depression (), grain elements () being grown on the inner areas of the trench-type depression (), a dielectric layer () being deposited on the surfaces of the grain elements and the inner areas of the trench-type depression, and a conduction layer being deposited on the dielectric layer, the grain elements () growing selectively on the inner areas () of the trench-type depression () in an electrode region () forming a lower region of the trench-type depression () and an amorphous silicon layer continuing to grow in a collar region () forming an upper region of the trench-type depression ().


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