Clock skew measurement circuit on a microprocessor die

Abstract

A structure and related method for determining the uncertainty window associated with clock signals on a microprocessor using circuitry on the microprocessor die itself and external software. A target clock signal of interest is compared to a series of reference clock signals having the same frequency, but differing in phase relationship. Where the target clock signal makes state transitions with respect to the various reference clock signals over the course of several thousand comparisons is indicative of the uncertainty window for that target clock. By adjusting the phase relationship between the reference clock signals, and thereby adjusting the width of the time windows defined by corresponding features of the reference clock signals, the uncertainty window for the target clock signal may be iteratively determined.