Receiver with plural detecting processors

Abstract

A receiver for detecting and recovering data from received data bearing radio signal samples comprises first and second detecting processors. Each of the detecting processors comprises a data store operable to store a predetermined number of the signal samples, an equalizer operable to combine the signal samples with a plurality of equalizer coefficients, to produce refined signal samples representative of the received signal samples but with the effect of inter-symbol interference caused by multi-path propagation experienced by the received radio signals at least partially reduced, a combiner operable to receive the refined signal samples from the equalizer and to receive second refined signal samples, from the other detecting processor, derived from a further received version of the received signals, and to combine the first and second refined signal samples, and a data processor operable to receive the stored signal samples from the data store, and to receive second stored signal samples and to adapt the equalizer coefficients for the first detecting processor and the equalizer coefficients for the second detecting processor, to the effect of increasing the probability of correctly recovering the data from the received radio signal samples. By communicating the stored signal samples from the sample store of each of the detecting processors to one of the data processors acting as a master detecting processor, the equalizer coefficients for the equalizer for each detecting processor can be calculated together to the effect of increasing the probability of correctly recovering the data from the combined signals. In preferred embodiments the equalizer is a linear equalizer. The receiver finds application, in particular but not exclusively, in recovering data from spread spectrum radio signals, as used for example in CDMA systems.