The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 28, 2006
Filed:
Aug. 12, 2005
Chieh-hung Chen, Hsinchu, TW;
Yi-chung Chen, Chutong Township, Hsinchu County, TW;
Po-chiun Huang, Hsinchu, TW;
Chieh-Hung Chen, Hsinchu, TW;
Yi-Chung Chen, Chutong Township, Hsinchu County, TW;
Po-Chiun Huang, Hsinchu, TW;
National Tsing Hua University, Hsinchu, TW;
Abstract
The present invention discloses an on-line calibration method, which utilizes two calibration algorithms running in the background without interrupting the normal operation of the analog signal process. The method includes performing a residue amplifier gain error calibration and performing a DAC non-linearity calibration. The residue amplifier gain error calibration can reduce the gain error of the residue amplifier for a missing code or a missing decision level phenomenon. The DAC non-linearity calibration can relax the matching requirement of passive components in current semiconductor processes. The present invention discloses a two-step ADC (Analog-to-Digital Converter), which includes a first signal processing unit, a second signal processing unit, a programmable gain control unit and a programmable reference voltage generator, performing the on-line calibration method.