The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2006

Filed:

Dec. 18, 2003
Applicants:

Tae Jin Kang, Ichon-Shi, KR;

Kee Teok Park, Ichon-Shi, KR;

Inventors:

Tae Jin Kang, Ichon-Shi, KR;

Kee Teok Park, Ichon-Shi, KR;

Assignee:

Hynix Semiconductor Inc., Kyungki-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A clock enable buffer for entry of a self-refresh mode. The clock enable buffer includes a current mirror load connected between a voltage source and first and second nodes, wherein the current mirror load has first and second transistors; a third transistor connected between the first node and a third node, wherein the third transistor is turned on according to a reference voltage; a fourth transistor connected between the second node and the third node, for controlling the current mirror load in response to a clock enable signal; a fifth transistor connected between the third node and a ground, wherein the fifth transistor is turned on according to a self-refresh signal; and a sixth transistor that is turned on according to an inverted self-refresh signal to make the potential of the first node a Low level.


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