The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 21, 2006
Filed:
Jun. 10, 2003
Jonathan Y. Zhang, Plano, TX (US);
Robert J. P. Nychka, Richardson, TX (US);
Eric L. P. Badi, Cagnes sur Mer, FR;
Jonathan Y. Zhang, Plano, TX (US);
Robert J. P. Nychka, Richardson, TX (US);
Eric L. P. Badi, Cagnes sur Mer, FR;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
Apparatus and methods are disclosed herein that provide reduced bus transaction latency on a bus architecture that includes at least one master coupled to a plurality of slaves. As disclosed herein, a device (e.g., a slave) may include bus logic and host logic coupled to the bus logic. The bus logic may obtain a serialization token permitting the host logic to complete a transaction received by the bus logic via the bus. Further, the bus logic may keep the serialization token to complete at least one other transaction.