The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 21, 2006
Filed:
May. 02, 2002
Shlomo Berliner, Kiriat Ono, IL;
Alan Bensky, Gan Yavne, IL;
Reuven Amsalam, Neo-Zione, IL;
Gil Baver, Rosh-Ha'ayin, IL;
Daniel Aljadaff, Kiriat Ono, IL;
Shlomo Berliner, Kiriat Ono, IL;
Alan Bensky, Gan Yavne, IL;
Reuven Amsalam, Neo-Zione, IL;
Gil Baver, Rosh-Ha'ayin, IL;
Daniel Aljadaff, Kiriat Ono, IL;
AeroScout, Inc., Rehovot, IL;
Abstract
A method and system for distance measurement in a low or zero intermediate frequency (IF) half-duplex communications loop measures the distance between two transceivers without synchronizing the local oscillators of the two transceivers. Transceiver distance may be measured in systems that use direct conversion (zero IF) or intermediate frequencies that are so low that phase noise significantly reduces the accuracy of the distance measurement. The communications loop demodulates, re-modulates and retransmits a received signal to provide a re-transmitted signal that has the same carrier and modulation frequency as the received signal. A phase-hold circuit provides an analog system for half-duplex operation that retains the frequency and phase information of the received signal for retransmission in a subsequent time slot. Alternatively, a digital implementation provides phase and frequency retention via a sample and delay system comprising an analog-to-digital conversion (ADC) subsystem, a first-in-first-out (FIFO) memory and a digital-to-analog (D/A) converter.