The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 21, 2006
Filed:
Apr. 01, 2005
Milind P. Padhye, Austin, TX (US);
Yuan A. Yuan, Austin, TX (US);
Mahbub M. Rashed, Austin, TX (US);
Milind P. Padhye, Austin, TX (US);
Yuan A. Yuan, Austin, TX (US);
Mahbub M. Rashed, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A flip-flop () comprises a first latch circuit (), a second latch circuit (), and a third latch circuit (). The first latch circuit () is coupled to receive a clock signal and a first power supply voltage. The second latch circuit () is coupled to the first latch circuit () and receives the clock signal and the first power supply voltage. Preparatory to entering a low power mode, the third latch circuit () receives a second power supply voltage and is coupled to the second latch circuit () in response to a power down signal. During the low power mode, the first power supply voltage is removed from the first and second latch circuits (). When returning to a normal operating mode, the first power supply voltage is provided to the first and second latch circuits (), and the third latch circuit () is coupled to the first latch circuit () in response to a power restore signal.