The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 21, 2006
Filed:
Dec. 18, 2003
Tsuyoshi Inoue, Ibaraki, JP;
Hiroshi Yamamoto, Ibaraki, JP;
Mitsuru Yoshikawa, Ibaraki, JP;
Saiki Hotate, Ibaraki, JP;
Tsuyoshi Inoue, Ibaraki, JP;
Hiroshi Yamamoto, Ibaraki, JP;
Mitsuru Yoshikawa, Ibaraki, JP;
Saiki Hotate, Ibaraki, JP;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A semiconductor substrate that has a MOS transistor with a high breakdown voltage having double sidewall insulation films and can inhibit negative effects on the electric characteristics and method thereof. The semiconductor device is formed as a transistor with a configuration having gate insulation filmand gate electrodeformed on semiconductor substrate, inner sidewall insulation filmformed at least on part of the gate insulation film and on both sides of the gate electrode, outer sidewall insulation filmformed at least on part of the gate insulation film and on both sides of the inner sidewall insulation film, low concentration impurity areacontaining an impurity at a low concentration and formed in the semiconductor substrate in the area underneath the inner sidewall insulation film and the outer sidewall insulation film, and high concentration impurity areacontaining an impurity at a concentration higher than the low concentration impurity area and formed in the semiconductor substrate in the area underneath both sides of the outer sidewall insulation film.