The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7138340 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 21, 2006

Filed:

Jun. 15, 2004
Applicants:

Sung-kwon Lee, Ichon-shi, KR;

Tae-woo Jung, Ichon-shi, KR;

Inventors:

Sung-Kwon Lee, Ichon-shi, KR;

Tae-Woo Jung, Ichon-shi, KR;

Assignee:

Hynix Semiconductor Inc., Kyougki-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/302 (2006.01); H01L 21/461 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed is a method for fabricating a semiconductor device without damaging a hard mask of a conductive structure. The method includes the steps of: forming a plurality of conductive structures on a substrate, each conductive structure including a conductive layer and a hard mask; sequentially forming a first nitride layer, an oxide layer, a second nitride layer, and an etch stop layer on the plurality of conductive structures; forming an inter-layer insulation layer on the etch stop layer; removing a portion of the inter-layer insulation layer through a planarization process; performing a self-aligned etching (SAC) process selectively etching the inter-layer insulation layer, the second nitride layer and the oxide layer until the SAC etching process is stopped at the first nitride layer to thereby form a contact hole exposing the first nitride layer; and removing the first nitride layer by performing a blanket etch-back process to thereby expose the conductive layer.


Find Patent Forward Citations

Lee, Sung-Kwon. (2006). Method for fabricating semiconductor device without damaging hard mask during contact formation process (U.S. Patent No. 7138340). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7138340

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