The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 21, 2006
Filed:
May. 26, 2004
Noriaki Sakamoto, Gunma, JP;
Yoshiyuki Kobayashi, Gunma, JP;
Junji Sakamoto, Gunma, JP;
Shigeaki Mashimo, Gunma, JP;
Katsumi Okawa, Gunma, JP;
Eiju Maehara, Gunma, JP;
Kouji Takahashi, Gunma, JP;
Noriaki Sakamoto, Gunma, JP;
Yoshiyuki Kobayashi, Gunma, JP;
Junji Sakamoto, Gunma, JP;
Shigeaki Mashimo, Gunma, JP;
Katsumi Okawa, Gunma, JP;
Eiju Maehara, Gunma, JP;
Kouji Takahashi, Gunma, JP;
Sanyo Electric Co., Ltd., Osaka, JP;
Abstract
A method of manufacturing a semiconductor device is described. A board that includes a flat back face, corresponding to a resin sealing area, and a front face that has projections is provided. The projections are formed of a metal that is integral with the board and include (a) a bonding pad provided in an area surrounded by an area that contacts an upper die, (b) a wiring that is integrated with the bonding pad and which extends to a semiconductor element mounting area, and (c) an electrode provided in one body with the wiring. A semiconductor element is mounted on the semiconductor element area and electrically connected to the bonding pad. The board is placed on a lower die and resin is filled into a space formed by the board and upper die. The board is divided into multiple devices such that the projections are separated by removing the board exposed at the back face of the resin.