The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 14, 2006
Filed:
Jun. 30, 2003
Robert E. Cypher, Saratoga, CA (US);
Mark D. Hill, Madison, WI (US);
David A. Wood, Madison, WI (US);
Robert E. Cypher, Saratoga, CA (US);
Mark D. Hill, Madison, WI (US);
David A. Wood, Madison, WI (US);
Sun Microsystems, Inc., Santa Clara, CA (US);
Abstract
A mechanism and method for maintaining cache consistency in computer systems that implements synchronized broadcasts using skew control and queuing. An access right corresponding to a given block allocated in a first active device may be configured to transition in response to a corresponding data packet being received through a data network. Additionally, transitions in ownership of the given block may occur at a different time than the time at which the access right to the given block is changed. To implement synchronized broadcasts, the address and data networks are configured such that a maximum amount of time from when a given broadcast packet conveyed on the address network arrives at a first active device to a time when the given broadcast packet arrives at a second active device is less than or equal to a minimum amount of time from when a data packet sent on the data network from the first active device arrives at the second active device. Each of the active devices may further comprise a queue control circuit coupled to an address-in queue and a data-in queue. The queue control circuit may be configured to prevent processing of a particular data packet that arrived in the data-in queue until all address packets that arrived earlier in the address-in queue are processed.