The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 14, 2006
Filed:
Mar. 21, 2003
Kian Chong, Sunnyvale, CA (US);
Dean Liu, Sunnyvale, CA (US);
Claude R. Gauthier, Cupertino, CA (US);
Kian Chong, Sunnyvale, CA (US);
Dean Liu, Sunnyvale, CA (US);
Claude R. Gauthier, Cupertino, CA (US);
Sun Microsystems, Inc., Santa Clara, CA (US);
Abstract
A mixed signal delay locked loop characterization technique for automatically characterizing a mixed signal delay locked loop is provided. The technique tests the mixed signal delay locked loop using a top-down approach in order to ensure the robustness of the mixed signal delay locked loop. Top-level testing involves testing the performance of the mixed signal delay locked loop in different process corners, and the results obtained from the top-level testing are then used to test sub-components of the mixed signal delay locked loop.